Conventionally, there have been known an active matrix-type liquid crystal display device having TFTs (thin-film transistors) as switching elements. This liquid crystal display device is provided with a liquid crystal panel constituted by two insulating substrates facing toward each other. One of the substrates of the liquid crystal panel is provided with gate bus lines (scanning signal lines) and source bus lines (video signal lines) arranged in matrix, and is provided with TFTs that are provided near intersections between the gate bus lines and the source bus lines. Each of the TFTs is configured by a gate terminal connected to a corresponding one of the gate bus lines, a source terminal connected to a corresponding one of the source bus lines, and a drain terminal. The drain terminals are connected respectively to pixel electrodes, which are arranged in matrix on the substrate in order to form an image. The other of the substrates of the liquid crystal panel is provided with a common electrode (also known as an “opposite electrode”) for applying a voltage between the common electrode and the pixel electrodes through the liquid crystal. In the configuration described above, based on a video signal that the source terminal of each TFT receives from the source bus line when the gate terminal of this TFT receives an active scanning signal from the gate bus line, a voltage is applied between the pixel electrode and the common electrode. This drives the liquid crystal, and a desired image is displayed on a screen.
In the meantime, the liquid crystal have a property that they deteriorate if a direct voltage continues to be applied. Accordingly, in the liquid crystal display device, an alternating voltage is applied to the liquid crystal. Such an application of the alternating voltage is realized by reversing polarities of a pixel voltage (a potential of the pixel electrode in reference to a potential of the common electrode) every single frame period in each pixel formation portion (region constituting a single pixel that is a minimum unit forming an image). As a technique for realizing high-quality display while performing alternating driving, driving methods such as line-reversal driving and dot-reversal driving have been known.
The line-reversal driving is a driving method in which polarities of the pixel voltages are reversed every single frame period and every single gate bus line (line by line). When the line-reversal driving is employed, the polarities of the pixel voltages in two consecutive frame periods are as illustrated in FIG. 12, for example. On the other hand, the dot-reversal driving is a driving method in which polarities of the pixel voltages are reversed every single frame period and every single gate bus line, and polarities between adjacent pixel formation portions in a lateral (horizontal) direction are reversed during a single frame period. When the dot-reversal driving is employed, the polarities of the pixel voltages in two consecutive frame periods are as illustrated in FIG. 13, for example. It should be noted that, FIG. 12 and FIG. 13 illustrate the polarities of the pixel voltages in (16×8) pixel formation portions provided respectively corresponding to intersections between sixteen gate bus lines GL1 to GL16 and eight source bus lines SL1 to SL8.
Japanese Patent Application Laid-Open No. H11-352938 proposes a driving method for reducing power consumption of a display device employing the line-reversal driving or the dot-reversal driving. According to this driving method, gate bus lines are divided into a plurality of blocks, and sequential selection is performed to the plurality of blocks one by one while interlaced scanning is performed to the plurality of gate bus lines included in each block. For example, in a case in which eight gate bus lines GL1 to GL8 are divided into two blocks, the gate bus lines are selected in an order of “GL1, GL3, GL2, GL4, GL5, GL7, GL6, and GL8” as illustrated in FIG. 14. Accordingly, in order to obtain the polarities of the pixel voltages as illustrated in FIG. 12 or FIG. 13, it is only necessary to reverse the polarities of the video signals every two horizontal scanning periods instead of every single horizontal scanning period. As a result, power consumption is reduced.
It should be noted that, in this description, a driving method that satisfies items (1) to (4) listed below as the driving method disclosed in Japanese Patent Application Laid-Open No. H11-352938 is called “block-reversal driving”.    (1) Gate bus lines are divided into a plurality of blocks, and sequential selection is performed to the plurality of blocks one by one.    (2) Interlaced scanning is performed to the plurality of gate bus lines included in each block. With this, for each block, two vertical scannings (a scanning for selecting an odd-numbered line and a scanning for selecting an even-numbered line) are performed in a single frame period.    (3) In the two vertical scannings in the single frame period, polarities of video signals to be applied to source bus lines are reversed between the vertical scanning of the first time and the vertical scanning of the second time.    (4) In each of the pixel formation portions, polarities of pixel voltages are reversed every single frame period.
Further, relating to the present invention, there are also known conventional techniques as described below. Japanese Patent Application Laid-Open No. 2006-154810 discloses the invention of a scanning driver (gate driver) capable of performing sequential scanning and interlaced scanning selectively. Japanese Patent Application Laid-Open No. H08-320674 discloses that, in addition to the interlaced scanning, by reversing polarities of display signals (video signals) supplied to data lines (source bus lines) every predetermined period, it is possible to obtain excellent image quality as well as to reduce power consumption.